Analog Design Engineer

Analog Design Engineer Mid-level (L4 equivalent) 2-5 years

Other levels: Senior Analog Design Engineer Principal Analog Design Engineer Staff Analog Design Engineer Lead Analog Design Engineer Junior Analog Design Engineer

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Qualcomm

Texas Instruments

Analog Devices

Broadcom

NXP

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The job description

Tech stack. CMOS analog design, Cadence Virtuoso, Spectre simulation, op-amps and comparators, bandgaps and references, layout-dependent effects, Python and SKILL scripting, Monte Carlo analysis

About the role

You will design analog integrated circuits at a semiconductor company, creating the amplifiers, references, filters, and data converters that interface the digital world with physical reality. Analog designers work where every transistor matters: their circuits must meet demanding specifications for noise, linearity, power, and precision across process variation, voltage, and temperature. You will take blocks from specification through schematic design, simulation, layout supervision, and silicon validation, developing the deep circuit intuition that defines the craft.

What you will achieve

Design analog blocks such as operational amplifiers, comparators, voltage references, and filters in CMOS, meeting specifications for gain, bandwidth, noise, offset, and power consumption.
Simulate your designs thoroughly across process, voltage, and temperature corners plus Monte Carlo mismatch analysis, ensuring robust performance and acceptable yield before tapeout.
Drive key specifications including noise, linearity, PSRR, and CMRR to their targets through careful topology selection, device sizing, and biasing choices grounded in hand analysis.
Supervise or perform layout of your blocks with attention to matching, symmetry, parasitics, and isolation, since in analog design the layout is inseparable from the circuit.
Validate your blocks on silicon through lab measurement, correlating results against simulation and debugging discrepancies with systematic bench techniques.
Document your designs with specification compliance matrices, design notes, and test plans that make your work reusable and maintainable by the broader team.

What you will bring

Must-haves

2 to 5 years of experience in CMOS analog IC design with silicon results.
Strong fundamentals in analog circuit theory: small-signal analysis, feedback, noise, mismatch, and stability.
Proficiency with Cadence Virtuoso and Spectre for schematic design and simulation.
Experience designing core analog blocks such as op-amps, comparators, bandgaps, or LDOs.
Understanding of layout effects on analog performance including matching, parasitics, and latch-up prevention.
Systematic debug skills for both simulation anomalies and silicon measurement discrepancies.
Craftsmanship mentality: you take pride in elegant, robust circuits that work the first time on silicon.

Nice-to-haves

Experience with advanced process nodes and their analog design challenges.
Familiarity with Verilog-A/AMS modeling for mixed-signal verification.
Knowledge of ESD protection strategies for analog IO.
Scripting skills in SKILL or Python for design automation.