Senior Analog IC Design Engineer

About the role

You will join an analog semiconductor company as a senior designer on the power and interface team, the group responsible for the highest-revenue analog product lines. The team ships high-voltage and precision analog in BCD processes for industrial and automotive customers who buy on reliability as much as performance. This role matters because you will own the hardest blocks on the roadmap, the ones where margin, SOA, and first-silicon success decide whether a platform wins its socket.

What you will achieve

• Lead the design of flagship analog subsystems from architecture through production release, delivering first-silicon success on multi-million-unit platforms
• Drive architecture tradeoffs that cut system BOM cost and board area, translating directly into design-win margins the business tracks quarterly
• Own safe-operating-area, latch-up, and ESD robustness for your blocks, achieving zero field returns attributable to your circuits across product lifetimes
• Cut bring-up risk by defining characterization plans that catch marginality early, reducing debug cycles by a third on your projects
• Mentor mid-level and junior designers through schematic reviews and tapeout checklists, raising the bar on documentation and review rigor team-wide
• Partner with applications and marketing to define datasheet limits that are aggressive enough to win benchmarks yet guard-banded enough to hold in production

What you will bring

Must-haves

• 5-8 years of analog IC design with multiple shipped production parts, at least one of which you architected or led end to end
• Expert intuition for device physics, second-order effects, and high-voltage design in BCD or similar processes
• Proven record of first-silicon success on complex blocks such as converters, drivers, references, or sensor interfaces
• Mastery of Cadence Virtuoso and Spectre including corners, Monte Carlo, aging, and high-temperature simulation
• Deep layout partnership skills: you can specify matching, isolation, and routing requirements a layout engineer can execute without rework
• Experience debugging silicon in the lab and driving ECOs, metal fixes, or full re-spins to a clean resolution
• B.S. or M.S. in Electrical Engineering; a track record of shipped products matters more than the degree level

Nice-to-haves

• Experience with automotive or functional-safety flows (ISO 26262, ASIL) and the documentation discipline they demand
• Familiarity with package co-design: thermal, lead inductance, and substrate noise effects on analog performance
• Prior customer-facing work supporting design wins, datasheets, or application notes