Lead CPU Design Engineer
The job description
Tech stack. SystemVerilog, CPU microarchitecture, team technical leadership, timing closure, UVM verification, synthesis and static timing analysis, Arm and RISC-V ISAs, project planning, code review methodology
About the role
You will lead a small team of CPU design engineers at a semiconductor company while remaining hands-on with the most challenging design work yourself. The team owns a set of CPU blocks, and you are accountable both for the technical quality of their RTL and for the professional growth of the designers creating it. This is a working leadership role for someone who wants to multiply their impact through others without giving up the craft: you will still write RTL, close timing, and debug the hardest problems, while ensuring the team delivers cohesively, hits its milestones, and each member develops steadily.
What you will achieve
- Lead a team of 3 to 6 designers in implementing a set of CPU blocks from microarchitecture specification through RTL design, functional verification, timing closure, and integration support.
- Deliver the team's RTL on the program schedule with quality that passes integration and system-level verification without excessive bug churn, late surprises, or rework that ripples into other teams.
- Own the hardest design problems in the team's scope personally, from timing-critical control logic to subtle microarchitectural corner cases, demonstrating the technical excellence the team aspires to.
- Run effective design and code reviews that catch bugs early, spread knowledge across the team, resolve technical disagreements fairly, and build a durable culture of craftsmanship and mutual accountability.
- Develop each team member deliberately through mentoring, stretch assignments matched to their growth areas, and candid, actionable feedback delivered with genuine care for their careers.
- Coordinate with program management on scope, schedule, dependencies, and risk, communicating status honestly, negotiating tradeoffs pragmatically, and escalating early when issues threaten commitments rather than hoping they resolve themselves.
What you will bring
Must-haves
- 7 or more years of experience in CPU or complex ASIC logic design with multiple successful tapeouts.
- Demonstrated technical leadership of designers, whether through formal team leadership or as the recognized technical authority people naturally follow.
- Strong RTL design skills with experience on timing-critical and functionally complex blocks that others found difficult.
- Solid verification skills and the discipline to hold the team to high quality bars without creating a culture of fear.
- Ability to plan, prioritize, and track design work across a small team with competing demands and limited time.
- Communication skills effective with individual designers, program managers, architects, and senior leadership alike.
- The balance to stay deeply technical while leading, earning respect through contribution and judgment rather than authority alone.
Nice-to-haves
- Experience hiring, onboarding, and growing design talent.
- Background spanning both design and verification or physical design for broader perspective.
- Familiarity with hardware program planning, milestone management, and risk tracking.
- Knowledge of advanced low-power design techniques relevant to the team's blocks.
Apple
NVIDIA
Intel
AMD
Arm
SiFive