Semiconductor Failure Analysis Engineer

About the role

A semiconductor manufacturer needs a failure analysis engineer to determine why devices fail, turning dead parts into actionable conclusions. You will receive failing units from qualification, production, or customer returns and apply electrical fault isolation followed by physical analysis to find the defect, documenting every step so conclusions hold up to scrutiny. Your findings drive the corrective actions that fix products, and a rigorous FA report is often the difference between a contained issue and a recurring field problem. The failure analysis engineer also builds the fault-isolation decision trees that guide junior analysts from symptom to technique, preserving the lab's hard-won diagnostic expertise.

What you will achieve

• Deliver root-cause conclusions on 90 percent of assigned cases within 10 business days of sample receipt, with conclusions tied to physical evidence rather than speculation.
• Drive fault isolation with EMMI, OBIRCH, or thermal techniques to localize defects within microns before any destructive analysis, preserving evidence, narrowing the search, and guiding efficient physical analysis to a defensible conclusion.
• Build FIB and TEM analysis workflows that produce publication-quality cross-sections for defect confirmation, with sample prep that preserves the failure site and produces multiple lamellae when the defect mechanism is uncertain.
• Reduce repeat-analysis requests by 50 percent through thorough first-pass documentation and imaging that answers follow-up questions before they are asked.
• Own the FA lab's case database so historical failures are searchable, letting new investigations start from prior learning instead of from zero, and enabling trend analysis across product families.

What you will bring

Must-haves

• BS or MS in electrical engineering, materials science, physics, or related field.
• 2 to 5 years in semiconductor failure analysis or a closely related lab role with case ownership.
• Hands-on experience with FIB, SEM, and electrical fault isolation techniques applied to real failure investigations.
• Understanding of semiconductor device physics sufficient to interpret failure signatures and distinguish process, design, and EOS/ESD causes.
• Careful sample handling and documentation discipline that preserves chain-of-custody integrity for customer and legal scrutiny.
• Ability to write clear FA reports with conclusions explicitly tied to evidence, including what was ruled out and why.

Nice-to-haves

• TEM operation or advanced sample-prep experience for atomic-scale defect confirmation.
• Experience with nano-probing or AFM-based electrical analysis for front-end defect localization.
• Knowledge of package-level FA techniques including SAM, X-ray, and cross-sectioning.