RF/Mixed Signal Design Engineer

Mixed Signal Design Engineer Mid-level (L4 equivalent) 2-5 years

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The job description

Tech stack. Cadence Virtuoso, SpectreRF, ADS, EMX/HFSS, Calibre, MATLAB, RF CMOS/BiCMOS PDKs

About the role

You will design RF front-end circuits with mixed-signal interfaces at a fabless semiconductor company building wireless connectivity chips. The team owns the receive and transmit chains (LNAs, mixers, VGAs, synthesizers) plus the ADCs, DACs, and calibration logic that turn RF signals into bits. This role matters because link budget, sensitivity, and blocker tolerance are set by your front end, and no amount of digital processing recovers what your LNA loses. You will partner with the modem and systems teams on link budgets and with packaging on board-level matching, so your front end performs in the real product rather than only on the bench.

What you will achieve

Ship RF front-end blocks (LNA, mixer, or VGA) with measured noise figure, linearity (IIP3), and gain meeting the link budget on first silicon across process and temperature.
Drive receiver sensitivity by co-optimizing the LNA, mixer, and baseband filter with the system team, hitting the target sensitivity within 1 dB of the link budget on measured silicon.
Reduce blocker-induced desensitization through linearity-focused design: IIP2/IIP3 calibration or architecture choices that hold performance with blockers present.
Own the RF-to-digital interface: design or integrate the ADC/DAC and AGC loop that connect your front end to the modem, with settling and dynamic range verified in co-simulation.
Cut EM-related respins by modeling every inductor, balun, and critical interconnect in EMX/HFSS and closing extracted-view RF simulation before tapeout.

What you will bring

Must-haves

2-5 years designing RF CMOS or BiCMOS circuits (LNA, mixer, PA driver, VCO, or synthesizer) with tapeout and measured results.
Strong RF fundamentals: noise figure, linearity (IIP2/IIP3, P1dB), s-parameters, impedance matching, and up/down conversion architectures (direct conversion, superheterodyne, low-IF).
Fluency in SpectreRF: PSS, PAC, PNOISE, and periodic analyses applied to real RF blocks.
Experience with EM modeling of on-chip passives at GHz frequencies and correlating to lab measurements.
Lab skills with RF instruments: spectrum analyzers, network analyzers, signal generators, and noise figure measurement.
Understanding of the mixed-signal boundary: ADC/DAC interfaces, AGC loops, and DC offset or IQ imbalance calibration.

Nice-to-haves

Experience with PLLs or frequency synthesizers for RF LO generation.
Knowledge of ESD protection for RF pads that preserves RF performance.
Familiarity with wireless standards (Wi-Fi, Bluetooth, cellular, or UWB) and their RF requirements.