Memory Analog Design Engineer

About the role

You will design the analog and custom circuits inside memory products at a semiconductor company, building the sense amplifiers, bitline drivers, charge pumps, and timing circuits that make SRAM, DRAM, and emerging memories work. Memory analog designers operate at the intersection of digital density and analog sensitivity: their sense amplifiers must detect millivolt bitline swings reliably across billions of bitcells and extreme process variation. You will characterize bitcells, design sensing schemes, and ensure memory products yield at high volume. You will also develop the redundancy and repair schemes that rescue failing bitcells, directly lifting wafer sort yield on every memory product you touch.

What you will achieve

• Design sense amplifiers and bitline sensing schemes achieving reliable operation with minimal sensing margin across process, voltage, temperature, and aging variation.
• Characterize memory bitcells statistically, understanding read stability, write margin, and retention behavior deeply enough to set design targets with confidence.
• Design supporting analog circuits including charge pumps, voltage regulators, bandgaps, temperature sensors, and timing references for the memory macro.
• Optimize memory macros for power including bitline swing reduction, divided wordline techniques, and power-gating strategies appropriate to the memory type.
• Implement redundancy, repair, and ECC schemes in collaboration with digital designers, balancing yield improvement against area and complexity costs.
• Support high-volume production ramp including shmoo analysis, failure analysis, and yield learning, driving the systematic improvements that make memory products profitable.

What you will bring

Must-haves

• 5 to 8 years of experience in memory circuit design with shipped SRAM, DRAM, or non-volatile memory products.
• Deep understanding of bitcell operation, stability metrics, and statistical variation effects on memory yield.
• Strong circuit design skills for sense amplifiers, bitline drivers, and memory peripheral circuits.
• Experience with statistical design and analysis including Monte Carlo, high-sigma analysis, and importance sampling for rare failure events.
• Knowledge of redundancy, repair, ECC, and other yield-enhancement techniques.
• Proficiency with Cadence tools and memory-specific characterization flows.
• Production mindset: you design for yield and manufacturability, not just nominal functionality.

Nice-to-haves

• Experience with emerging memories such as MRAM, RRAM, or FeRAM and their unique circuit challenges.
• Familiarity with 3D stacked memory architectures or advanced packaging.
• Knowledge of memory test, DFT, and built-in self-repair methodologies.
• Background in high-bandwidth memory or graphics memory design.