Junior Mixed Signal Design Engineer

Mixed Signal Design Engineer Entry-level (L3 equivalent) 0-2 years

Other levels: Mixed Signal Design Engineer Senior Mixed Signal Design Engineer Principal Mixed Signal Design Engineer Staff Mixed Signal Design Engineer Lead Mixed Signal Design Engineer

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Analog Devices

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NXP

Marvell

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The job description

Tech stack. Cadence Virtuoso, Spectre, basic Verilog-AMS, Calibre, MATLAB, university or internship analog coursework

About the role

You will join the analog team at a fabless semiconductor company as a junior designer, paired with a senior mentor who will guide your first tapeouts. The team expects you to start with well-scoped blocks (comparators, bandgaps, simple amplifiers, bias circuits) and grow into owning larger mixed-signal blocks as your judgment develops. This role matters because the company invests in growing its own analog talent, and your growth rate will decide how quickly you become a trusted block owner. Expect structured mentorship, regular design reviews, and a clear growth path: the company has a strong record of promoting junior designers who show rigor and curiosity.

What you will achieve

Ship your first tapeout-ready block within your first year: a scoped analog block (comparator, reference, or amplifier) with schematic, simulation results, layout review participation, and a test plan you helped write.
Build simulation fluency fast: run corners, Monte Carlo, and mismatch analysis independently in Spectre within your first six months, and explain your results clearly in design reviews.
Reduce review cycles on your work by learning from feedback: track every review comment, close them before the next review, and stop repeating the same mistakes.
Contribute to silicon bring-up in the lab: take bench measurements under supervision, compare them against simulation, and write up the deltas for the team.
Grow into block ownership: by the end of your second year, take a medium-complexity block from spec to sign-off with only light senior review.

What you will bring

Must-haves

0-2 years of experience, which can include strong internships or a thesis, in analog/mixed-signal circuit design.
Solid fundamentals: device physics, small-signal models, noise, feedback, and mismatch, from coursework you can actually apply.
Familiarity with Cadence Virtuoso and Spectre from university labs, tapeout classes, or internships.
A completed analog design project (course, thesis, or internship) that you can walk through at the transistor level and defend.
Curiosity about silicon reality: you want to measure your circuits in the lab, not just simulate them.
Coachability: you take direct technical feedback well and iterate fast.

Nice-to-haves

A university tapeout or MPW chip with your block on it.
Familiarity with Verilog-AMS or SystemVerilog basics.
Scripting in Python or MATLAB for data analysis.