GPU Design Verification Engineer

About the role

You will verify graphics processing units at a semiconductor company where thousands of parallel threads must produce pixel-perfect and numerically correct results. Working alongside GPU architects and RTL designers, you will prove that shader cores, fixed-function units, and the memory hierarchy behave correctly under massive parallelism. Your checkers decide whether the GPU renders reality correctly and computes without error, and your workloads are the first real stress the design ever sees. A single rendering artifact or numerical error at scale becomes a headline, which is why your verification holds the GPU to the strictest correctness bar in the company.

What you will achieve

• Deliver verification environments for GPU compute or graphics pipelines that run representative workloads (shaders, kernels, draw calls) against cycle-level checkers.
• Drive coverage of parallel execution corner cases (thread divergence, barrier synchronization, atomic operations) to closure, with the coverage model reviewed by the design team.
• Ship a transaction-level reference model for your assigned units that flags any numerical or functional divergence from expected behavior.
• Cut debug time on massively parallel failures by building deterministic replay and thread-level tracing into your testbench from the start.
• Reduce architectural risk by co-verifying new ISA extensions or fixed-function features with architects before RTL freezes, when changes are still cheap.

What you will bring

Must-haves

• 2 to 5 years of ASIC verification experience, ideally with parallel or high-throughput designs.
• Strong SystemVerilog/UVM skills with experience verifying complex datapaths or control logic at scale.
• Understanding of GPU architecture fundamentals: SIMT execution, warps and wavefronts, memory coalescing, and cache hierarchies.
• Familiarity with graphics or compute APIs at the concept level, enough to know what workloads actually stress the hardware.
• Experience debugging failures involving concurrency: races, ordering violations, and synchronization bugs across many threads.
• Collaborative style for working with architects on the verification implications of microarchitectural choices.
• Comfort with scale: GPU regressions are long and failures are noisy, and you bring order to both.

Nice-to-haves

• Experience with formal verification of GPU control logic or memory subsystems.
• Knowledge of ray tracing, tensor cores, or other specialized GPU units.
• Familiarity with performance verification under realistic workload mixes.
• Exposure to graphics driver or shader compiler concepts that inform test content.