Data Converter (ADC/DAC) Analog Designer

Analog Design Engineer Senior (L5 equivalent) 5-8 years

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The job description

Tech stack. Data converter design, SAR, pipeline, and delta-sigma ADCs, DAC architectures, Cadence Virtuoso, Spectre, calibration techniques, jitter analysis

About the role

You will design analog-to-digital and digital-to-analog converters at a semiconductor company, building the precision interfaces between the analog and digital worlds. Data converter designers work in one of analog's most demanding specialties: their circuits must achieve high resolution, linearity, and speed simultaneously while managing noise, mismatch, clock jitter, and power. You will architect converter topologies, design the critical analog blocks, implement calibration that pushes performance beyond raw device matching, and validate ENOB, SFDR, and SNR on silicon.

What you will achieve

Architect and design ADCs using SAR, pipeline, delta-sigma, or hybrid topologies selected through quantitative analysis of the resolution, speed, power, and area requirements.
Design DACs including current-steering, R-2R, and delta-sigma architectures meeting linearity, glitch energy, and output compliance specifications.
Implement digital calibration and error correction techniques such as background calibration, dithering, or mismatch shaping that extract performance beyond intrinsic device matching.
Design the critical sub-blocks including comparators, residue amplifiers, reference buffers, and clock generation with the precision the converter architecture demands.
Analyze noise, jitter, and distortion budgets rigorously, allocating error contributions across the signal chain and verifying the budget through simulation and measurement.
Validate converters on silicon with comprehensive dynamic testing including FFT-based SNR, THD, SFDR, and INL/DNL characterization, correlating measured performance against design models to close the loop for future designs.

What you will bring

Must-haves

5 to 8 years of experience in data converter design with shipped products and measured silicon results.
Deep understanding of converter architectures: SAR, pipeline, flash, delta-sigma, and their respective tradeoffs.
Strong circuit design skills for comparators, amplifiers, switches, and references optimized for converter applications.
Knowledge of calibration theory and practice including foreground, background, and digital correction techniques.
Understanding of clock jitter effects on converter performance and low-jitter clocking design.
Proficiency with Cadence tools and converter-specific verification including transient noise and periodic analyses.
Systematic bench measurement skills for dynamic converter characterization.

Nice-to-haves

Experience with high-speed converters above 1 GS/s or high-resolution converters above 16 bits.
Familiarity with time-interleaved architectures and mismatch calibration.
Knowledge of emerging converter applications in 5G, automotive radar, or AI accelerators.
Publications or patents in data converter design.