Chief Design Verification Architect

ASIC Design Verification Engineer Chief, company-wide technical authority 15+ years

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Qualcomm

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Cadence

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The job description

Tech stack. Verification strategy at company scale, methodology portfolio (UVM/formal/emulation), EDA vendor relations, signoff governance, talent architecture

About the role

You will be the company-wide technical authority for design verification at a semiconductor company, setting the verification vision that every program executes against. You will decide where the company invests: which methodologies, which tools, which partnerships, and what "tapeout-ready" means across product lines and process nodes. Your judgment determines whether the company's silicon reputation compounds or collapses, and your leadership builds the organization that delivers it year after year.

What you will achieve

Establish the company's multi-year verification strategy, aligning methodology investments (formal-first adoption, emulation scale, AI-assisted debug) with the product roadmap and measuring ROI.
Deliver a governance framework for tapeout signoff used consistently across all programs, with quantified risk reporting that executive leadership trusts.
Drive industry-leading first-silicon success rates by institutionalizing escape analysis, methodology feedback loops, and verification quality metrics company-wide.
Build the verification organization: define the technical ladder, set hiring bars, and develop principal and staff engineers into the next generation of leaders.
Represent the company's verification capability externally: with EDA vendors shaping tool roadmaps, with customers on quality commitments, and with the industry on methodology direction.

What you will bring

Must-haves

15+ years of ASIC verification leadership with a record of first-silicon success across multiple complex programs and product lines.
Demonstrated company or division-level technical authority: setting strategy that multiple organizations executed against.
Mastery across the verification portfolio: simulation, formal, emulation, low-power, and mixed-signal, knowing where each earns its investment and where it does not.
Executive presence: you quantify verification risk, cost, and schedule trade-offs for CEOs and boards in clear business terms.
Track record of building and scaling verification organizations, including hiring, mentoring, and succession planning.
Deep EDA industry relationships and the judgment to evaluate and commit to tool and methodology bets worth millions.
Long-horizon thinking: you invest in methodology and people that pay off three programs from now, not just this tapeout.

Nice-to-haves

Recognized industry voice: publications, keynotes, or standards participation in verification methodology.
Experience guiding verification through major transitions (new process node generations, new product categories, acquisitions).
Background spanning design and verification, giving you credibility with both disciplines at the highest level.
Board or advisory experience translating technical quality into business strategy.