Chief CPU Design Engineer

About the role

You will serve as the chief CPU design engineer at a semiconductor company, the ultimate technical authority for how the organization turns architecture into silicon. The chief design engineer defines the design vision across programs: the methodologies, the quality standards, the timing closure strategies, and the engineering culture that determine whether the company tapes out on time with working silicon. This is the most senior individual-contributor design role, carrying responsibility for the execution excellence of the entire CPU design organization. You will also run the cross-program design review board, where lead designers defend microarchitecture and timing choices before they commit the organization to silicon.

What you will achieve

• Set the company-wide vision for CPU design execution including methodologies, quality standards, review processes, and the technical career ladder for designers.
• Establish the timing closure and tapeout readiness frameworks used across all CPU programs, ensuring predictable execution regardless of program-specific challenges.
• Resolve the organization's most critical design crises, from schedule-threatening timing problems to deep functional issues, through decisive technical leadership.
• Build design excellence at scale by developing senior technical leaders, establishing mentorship structures, and creating the culture where quality is non-negotiable.
• Advise executive leadership on design organization capacity, program risk, technology bets, and build-versus-buy decisions with unflinching honesty.
• Represent the company's design capabilities to customers and partners, building confidence in the organization's ability to deliver complex silicon.

What you will bring

Must-haves

• 15 or more years of experience in CPU design with multiple generations of shipped, successful processors.
• Demonstrated success leading design execution at organizational scale across multiple programs.
• Mastery of RTL design, microarchitecture, timing closure, physical design interaction, verification, and silicon debug.
• Exceptional judgment in assessing design risk and schedule realism, proven through accurate calls on major programs.
• Outstanding communication and influence across designers, architects, executives, customers, and partners.
• A record of building design organizations and developing technical leaders who compound the organization's capability.
• The courage to halt or redirect programs when design quality or risk demands it, and the accountability to own those decisions.

Nice-to-haves

• Experience leading design through major technology transitions such as new process paradigms or chiplet architectures.
• Industry recognition through invited talks, publications, or standards leadership.
• Background spanning multiple companies with comparative perspective on design excellence.