Bare-Metal Embedded Engineer

About the role

You will join a semiconductor company writing the reference firmware and low-level drivers that ship with its microcontroller product line. There is no operating system here: your code is the first thing that runs after reset, and every customer building on these chips starts from your work. This role matters because the quality of bare-metal code determines how fast thousands of engineers can bring up products, and subtle bugs in startup code become everybody's problem.

What you will achieve

• Ship register-level peripheral drivers (GPIO, timers, ADC, DMA, serial) for a new MCU family, validated on silicon through three tapeout revisions with zero driver-attributed respins, and driver documentation reviewed by applications engineering
• Drive interrupt latency under 1 microsecond on the flagship core by hand-tuning vector tables and critical-section design, measured with cycle-accurate trace
• Reduce customer bring-up questions by writing startup code, linker scripts, and clock-tree initialization that work correctly out of the box on first silicon
• Build a cycle-accurate boot-time measurement suite that catches boot regressions to within 100 cycles in CI, running on every commit to the reference firmware, with trend graphs visible to the whole team
• Own the errata workarounds for two silicon revisions, containing hardware bugs in software so customers never see them and documenting each workaround for the datasheet

What you will bring

Must-haves

• 2-5 years writing bare-metal C with direct register manipulation and no HAL dependency, for ARM Cortex-M/R or RISC-V
• Fluency with linker scripts: sections, memory regions, scatter loading, and boot image layout you can draw from memory
• Experience writing startup code: reset handlers, vector tables, clock and PLL initialization, and memory initialization
• Working assembly knowledge for at least one architecture, applied to context switching, boot code, or optimized routines
• Deep peripheral understanding: DMA controllers, timers/counters, ADC sequencing, and clock trees
• Expert-level debugging with JTAG/SWD: hard-fault analysis, watchpoints, and instruction trace on misbehaving silicon
• Ability to read a 2,000-page reference manual and extract exactly what the hardware needs, ignoring the rest

Nice-to-haves

• Experience with secure boot or trusted execution bring-up at the bare-metal level
• Knowledge of low-level power management including sleep/wake sequencing and retention
• Contributions to vendor SDKs or open-source bare-metal projects used by other engineers