Storage Firmware Engineer

Firmware Engineer Mid-level (L4 equivalent) 2-5 years

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The job description

Tech stack. NAND flash management, flash translation layer (FTL) design, NVMe/SATA protocols, wear leveling algorithms, bad block management, ECC (BCH/LDPC), performance benchmarking, data path optimization

About the role

You will develop the firmware inside solid-state storage devices, where your code manages the messy physical reality of NAND flash behind a clean, simple block interface. Storage firmware engineers own the flash translation layer: wear leveling, garbage collection, bad block management, and the performance optimizations that determine whether a drive is exceptional or forgettable. You will work at the fascinating intersection of algorithms and hardware physics, where deep understanding of NAND characteristics translates directly into product differentiation. Your firmware decides how many years the drive lasts, how fast it runs, and whether customer data survives.

What you will achieve

Develop flash translation layer components including mapping tables, garbage collection, and wear leveling that meet performance, endurance, and data integrity targets
Deliver measurable storage performance improvements: higher IOPS, lower tail latency, and better sustained write performance, all backed by rigorous benchmarks
Implement robust bad block management and adaptive read-retry strategies that preserve data integrity as NAND cells age through their lifecycle
Debug complex storage issues including performance anomalies, data path errors, and rare corner cases with systematic analysis and clear root-cause documentation
Optimize data path code for the storage controller's specific architecture: efficient caching hierarchies, intelligent prefetching, and minimal latency overhead

What you will bring

Must-haves

2 to 5 years in storage firmware, embedded systems, or low-level systems software with genuinely performance-critical production code
Understanding of NAND flash physics: program/erase cycling, read disturb mechanisms, retention characteristics, and error rate behavior
Experience with storage protocols: NVMe, SATA, or eMMC/UFS command sets, queue management, and error handling flows
Strong C programming with performance consciousness: cache-friendly data structures, efficient algorithms, and lock-free techniques where appropriate
Knowledge of FTL design concepts: logical-to-physical mapping schemes, garbage collection algorithms, and wear leveling strategies
Familiarity with error correction: BCH and LDPC fundamentals, plus error recovery flows in real storage controller contexts
BS in Electrical or Computer Engineering

Nice-to-haves

Experience with NVMe over Fabrics, computational storage architectures, or ZNS (zoned namespaces) designs
Familiarity with storage performance benchmarking: FIO methodology, vendor tools, and realistic workload characterization
Knowledge of TCG Opal or Enterprise security standards for self-encrypting drive implementations
Experience designing and validating power-loss protection for storage devices