Semiconductor Reliability Engineer

Semiconductor Mid-level (L4 equivalent) 2-5 years

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Intel

TSMC

Samsung

Micron

Applied Materials

GlobalFoundries

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The job description

Tech stack. HTOL, ESD (HBM/CDM), electromigration, TDDB, NBTI/HCI, Weibull analysis, failure-rate modeling, qualification plans, AEC-Q100

About the role

A semiconductor manufacturer needs a reliability engineer to prove products survive their rated lifetimes under real operating conditions, the technical authority behind every lifetime claim in the datasheet. You will design stress experiments, run HTOL and ESD qualifications, model failure rates with proper statistics, and sign off on product reliability before release. Customers trust the datasheet because you verified it, and when field failures happen, you lead the analysis that determines whether the qualification missed something. The reliability engineer also owns the field-failure feedback loop that feeds return data back into qualification plans, ensuring the next product's stress tests reflect real operating conditions.

What you will achieve

Deliver qualification plans that achieve AEC-Q100 or JEDEC qualification on schedule with zero late failures, through test vehicles designed to capture worst-case stress conditions, including process-corner splits that bound manufacturing variation and voltage and temperature extremes.
Drive failure-rate modeling so FIT predictions match field data within a factor of 2, giving product and quality teams credible numbers for customer commitments and warranty risk assessments that product management relies on.
Reduce qualification escapes by 60 percent through stress conditions and sample plans that reflect actual use cases rather than minimum standard compliance, including mission-profile-based testing for automotive and industrial products.
Own ESD robustness, achieving HBM and CDM targets on all new products before release, with margin demonstrated across corners and documented in the ESD design review.
Cut stress-test cycle time by 25 percent with optimized sample sizes and parallel stress conditions that maintain statistical validity, freeing lab capacity for additional qualification programs.

What you will bring

Must-haves

BS or MS in electrical engineering, physics, or materials science.
2 to 5 years in semiconductor reliability, qualification, or product engineering with stress-test ownership.
Experience designing and executing HTOL, temperature cycling, or HAST experiments, including acceleration model selection.
Understanding of failure mechanisms including electromigration, TDDB, NBTI, and hot-carrier injection, and how they manifest in test data.
Statistical analysis skills covering Weibull plots, acceleration models, and confidence intervals for lifetime projections.
Familiarity with ESD testing standards and protection design concepts sufficient to guide design fixes.

Nice-to-haves

Experience with automotive reliability standards such as AEC-Q100 or AEC-Q101.
Knowledge of soft-error or radiation reliability for high-reliability applications.
Failure analysis background to close the loop when stress tests produce failures.