IP Verification Engineer

ASIC Verification Engineer Mid-level (L4 equivalent) 2-5 years

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Broadcom

Marvell

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The job description

Tech stack. SystemVerilog, UVM, coreConsultant or IP delivery flows, configurability matrices, SVA, Synopsys VCS, documentation (IP-XACT basics)

About the role

You will verify reusable semiconductor IP at a company whose IP blocks ship to multiple internal SoC teams and external customers. IP verification is product verification: the block must work not just in one configuration but across its full parameter space, and its quality is judged by integrators you may never meet. Your testbenches, coverage, and documentation are the contract that lets SoC teams drop the IP into their designs with confidence. You will think like both a verification engineer and a product owner, anticipating the configurations, corner cases, and misuse scenarios that integrators will hit. When an SoC team integrates your IP without a single blocking bug, that is your verification doing its job silently and completely.

What you will achieve

Verify IP cores across their full configuration matrix (data widths, feature enables, parameter combinations), closing coverage on every supported configuration.
Deliver IP releases with zero integration-blocking bugs reported by SoC teams across at least two consecutive releases.
Build configurability-driven testbenches that automatically scale stimulus, checkers, and coverage to each parameter combination without manual rework, while regenerating the complete regression list and coverage reports for every supported configuration automatically.
Produce verification documentation (test plans, coverage reports, known-limitations notes) that meets the bar for customer-facing IP delivery.
Reduce IP integration support load by 40 percent through stronger pre-release verification and clearer integration guidelines.

What you will bring

Must-haves

2 to 5 years of verification experience, including work on reusable or configurable IP blocks.
Strong SystemVerilog and UVM skills with experience parameterizing testbenches across configurations.
Understanding of IP delivery concerns: versioning, release notes, and verification collateral that travels with the IP.
SVA skills for interface compliance checking against protocol specifications.
Experience with configurability matrices and combinatorial coverage of parameter spaces.
Familiarity with standard on-chip protocols (AMBA AXI/AHB/APB) from an IP provider perspective.
Clear technical writing for documentation consumed by external integrators.

Nice-to-haves

Experience with coreConsultant, IP-XACT, or similar IP packaging and delivery flows.
Knowledge of compliance test suites for standard protocols (for example, AMBA compliance).
Exposure to supporting IP customers through integration debug.
Experience with functional safety documentation for automotive IP.