Firmware Design Engineer

Firmware Engineer Mid-level (L4 equivalent) 2-5 years

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Seagate

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The job description

Tech stack. Firmware architecture design, hierarchical state machines, C/C++ implementation, interface contract design, design documentation, rapid prototyping, structured design reviews, timing analysis, simulation

About the role

You will specialize in the design phase of firmware development: system architectures, software interfaces, and state machines worked out with rigor before implementation begins. Firmware design engineers here produce the blueprints other engineers build from: layered architectures with clear dependencies, precise interface contracts, and timing designs validated by analysis rather than discovered in integration. You will lead formal design reviews, prototype the riskiest components early to prove feasibility, and ensure implementation teams inherit clarity instead of ambiguity. This role suits engineers who think deeply and completely before coding, and whose designs survive first contact with real hardware.

What you will achieve

Deliver firmware architecture documents with layered designs, explicit interface contracts, and timing budgets that implementation teams can build from directly
Prototype high-risk components early, including novel protocols and timing-critical paths, proving technical feasibility before full implementation commits resources
Lead structured design reviews that catch architectural flaws, interface mismatches, and timing problems when they are still cheap and easy to fix
Create complete state machine designs for complex device behaviors that are provably complete, thoroughly testable, and verifiable against requirements
Reduce implementation rework measurably across programs through upfront design rigor, tracked with rework metrics before and after

What you will bring

Must-haves

2 to 5 years in firmware or embedded software development with demonstrated strength in upfront architecture and detailed design work
Experience producing clear, complete design documentation: architecture diagrams, interface specifications, sequence diagrams, and timing diagrams
Strong state machine design skills: hierarchical state machines, event-driven architectures, and formal reasoning about completeness and correctness
Understanding of layered firmware architectures: hardware abstraction, middleware services, and application separation with clean, one-way dependencies
Ability to perform credible timing analysis: worst-case execution estimation, interrupt response budgets, and real-time schedulability reasoning
Facilitation skills for productive design reviews: presenting trade-offs fairly, capturing decisions accurately, and driving the team to consensus
BS in Electrical or Computer Engineering

Nice-to-haves

Experience with model-based design tools such as Simulink or Stateflow for control-oriented firmware development
Familiarity with formal verification methods applied to critical state machines or communication protocols
Knowledge of UML/SysML modeling applied pragmatically to embedded design documentation without excessive ceremony
Experience with structured architecture evaluation methods or formal trade study processes