Neural AI

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Defect Reduction Engineer

Semiconductor Mid-level (L4 equivalent) 2-5 years
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The job description

Tech stack. defect inspection (brightfield/darkfield), SEM review, defect source tracing, contamination control, cleanroom protocols, particle analysis (EDX), FOUP/AMHS

About the role

A wafer fab needs a defect reduction engineer focused on finding where defects come from and eliminating the sources, working from inline inspection forward to the tool, chamber, or handling step responsible. Unlike yield engineering, which works backward from sort data, you trace defects at the point of detection and shut down contamination sources before they affect more lots. You make the fab cleaner one source at a time, and your containment speed during excursions determines how many wafers survive. The defect reduction engineer also runs the excursion containment drills that train the fab to isolate contamination sources within hours, since every hour of spread costs wafers.

What you will achieve

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