Custom Analog IC Designer

Analog IC Design Engineer Mid-level (L4 equivalent) 2-5 years

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Qualcomm

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Skyworks

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The job description

Tech stack. Full-custom bespoke blocks, Cadence Virtuoso, Spectre, hand-crafted layout, device-level optimization, parasitic-aware design

About the role

You will join an analog IP vendor as a custom analog IC designer, building bespoke full-custom blocks that catalog IP cannot cover. Customers come to this team when standard cells and off-the-shelf IP fail their PPA targets: unusual supplies, extreme temperatures, or aggressive area budgets. This role matters because these one-off designs become the differentiators in customer SoCs, and your willingness to hand-optimize at the device level is exactly what the catalog cannot do. Each engagement brings different constraints, which keeps the work varied and the customer relationships deep.

What you will achieve

Deliver full-custom analog blocks tuned to individual customer specifications, hitting PPA targets that standard IP flows cannot reach
Cut block area and power through device-level optimization: hand-sized transistors, merged structures, and layout-driven circuit choices
Drive first-silicon success on bespoke designs by simulating with customer-specific corners, loads, and use cases rather than generic models
Build parameterized but hand-quality cells that give the team a starting point for the next custom engagement without sacrificing craftsmanship
Own the technical dialogue with customer architects, translating system requirements into circuit specifications you can sign and deliver
Document each custom block so thoroughly that support, porting, and derivative designs proceed without your direct involvement
Build long-term customer partnerships by consistently delivering differentiated blocks that keep clients returning with new projects

What you will bring

Must-haves

2-5 years of full-custom analog design with shipped silicon that demonstrates hand-optimized circuit work
Device-level intuition: you size from first principles and know exactly what each transistor is doing in your circuit
Fluency in Cadence Virtuoso and Spectre, with disciplined corner, Monte Carlo, and aging analysis on every design
Close partnership with layout: you can draw or direct critical matching structures yourself and catch parasitic issues pre-extraction
Experience adapting designs to non-standard constraints: unusual supplies, wide temperature, radiation, or tight area budgets
Strong customer-facing communication: you can explain tradeoffs and negotiate specs with architects outside your company
B.S. or M.S. in Electrical Engineering; a portfolio of hand-crafted full-custom silicon matters more than the degree itself

Nice-to-haves

Experience porting custom blocks across foundries or process nodes
Familiarity with specialty processes: SOI, high-voltage, or rad-hard technologies
A portfolio of particularly aggressive PPA results you can discuss in technical depth